Flux.ai being the incumbent
Silixon based out of the UK have been showing demos
Quilter and DeepPCB for layout
The recent OpenAI demo...
I went the other way and pre-designed sub circuits with a set of rules that allows simple merge assembly, unfortunately I didn't have the time or budget to continue with it, but I took the constrained approach as with hardware, things can't be 99%.
The one thing I will say, is that my experience of hardware engineers is very gatekeepy.
Any questions about the use of AI for any form of automation on forums/Reddit get shot down instantly and the OP's told 'skill issue' more or less. In my opinion, just as with software, most work is simple and should be automated, there will always be a need for the real engineering when it comes to high specification work, high volume optimisation and hardware debug (although Claude code is pretty handy at driving a Jlink)
> The one thing I will say, is that my experience of hardware engineers is very gatekeepy.
Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.
You also need to understand the history of autorouting technology for PCBs. Autorouters with auto layout have been around in many forms for years. Their output never compares to a skilled EE doing it manually. The gap between autorouter output and skilled operator output is even bigger than the gap between a good developer and average AI codegen slop.
I’m interested in this space, but even the Fable/Astra or dedicated tools like Quilter, Flux, and others have a very, very long way to go for boards more complex than simple hobby boards.
I do think this is going to be good for hobby people doing simple PCBs though
> Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.
Magic smoke is important, as it indicates a design parameter was exceeded.
I often recommend folks get a mini thermal camera for their phone... as inspecting for issues in electrical, hydraulic, or mechanical systems gets a fair bit easier/safer. =3
If anything, it's closer to the bin packing problem. The cost function isn't expressed in terms of lowest cost between nodes, but instead fitting all of the traces with the lowest board layer count while still meeting stuff like EMI crosstalk guidelines. Then there'll be some traces that are very constrained (think DRAM or SERDES links) that have to be length matched, but those are pretty much invariably point to point links that already are heavily automated.
Traces being, say 20% longer than they need to be for an optimal solution doesn't really change the performance of the board in the vast majority of cases since they'll be some of the lowest resistance components of the netlist anyway, as well as the fact that the PCB is normally oversized for the number of traces needed as it fulfills structural/mechanical needs as well as the netlist needs.
And on top of that, because the optimal solution probably is NP-hard, once again, the industry doesn't look for optimal, only good enough. If layout techs in Altium were regularly solving NP-hard problems, computer science would be a different place. The only goal I see is to meet that bar without hiring layout techs.
>Traces being, say 20% longer than they need to be doesn't really change the performance of the board
Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.
Even free Qspice (a more modern Analog Devices LTSpice) is a far better option:
My experience with hardware engineers, at least IRL, is very different. They love to talk about their work. However, I used to be an EE so that probably helps.
As for Reddit, there's a lot of "bury head in sand and problem will go away" behavior when it comes to AI. People are understandably worried about their jobs, but they're certainly not doing themselves any favors by downplaying AI or looking for "tech niches where AI isn't yet."
Copperhead is very interesting. I do some embedded systems consulting on the side, but I've never enjoyed PCB layout very much. I briefly investigated using AI for it the last time I had to do a board, but it wasn't very helpful.
This is probably not the primary way people use the tool, but if I log in (desktop, Chrome on macOS), click "Start a board" on the sidebar, and go to click any of the inputs, I can't type text in them (the inputs are "Start from an example", "What are you building", and "The brief".
Why would somebody ever use a hosted version? I see
"One-click gerber, DXF/STEP, render and BOM export" and "Altium support beyond KiCad" in cloud plans, dunno if they are compelling.
It seems like this is just controlling KiCad. Assuming this produces a BOM as well, you could take the output files, send them to a board house like PCBWay or JLPCB and get the boards stuffed and shipped to you.
The board houses may have questions for you that may be difficult for you to answer, but theoretically you could answer those with AI and get fully assembled boards delivered right to your doorstep.
not quite. copperhead operates on its own hardware IR, compiles verified KiCad files and generates manufacturing outputs.
we're also building a design house around it to close the loop with fabs, handle DFM questions and eventually let you hit "order" and receive fully assembled boards!
With AI enabled consumer hardware usecases going to explode this is something super relevant. At least 5 startups have pitched their wearables to me and they could definitely use this
Design for Manufacturability (DFM) will determine if they generate a viable product. Hardware is difficult, with a success rate around 1:66 for a startup.
It is a good idea to consult with a contract manufacturer engineering team early, and stop wasting peoples time including their own.
I have also seen people re-brand China pad-printed generic products, and claim they needed investor help buying a shipping container full of cheap stuff or outright e-waste. Careful, especially if you see multiple versions or the same product pop up at the same time. Best of luck =3
The website is the marketing for the product, most people see that first, and they wont go further if your front door is festooned with goofball stuff.
copperhead isn't just a wrapper around claude or gpt. it combines model intelligence with its own hardware IR, deterministic engines and continuous verification.
Some PM realized that agents will not push back against waterfall style project planning, so now we get an agent for all possible versions of waterfall projects.
fair critique but copperhead works as a feedback loop: design, verify, revise and repeat. closer to an engineering control loop than waterfall with an agent on top :)
When it gets to the end of the design loops, can it run simulations and tests, or is that out of scope i.e., for another product? (I didn't notice testing on a very quick peruse, but that doesn't mean I didn't simply miss it)
You joke but my coping saw cuts wood much faster than any of my normal saws. I don't know a lot about saws, I presume it's the type of blade on it. And I do indeed have three saws, which is a lot for someone who doesn't know much about saws. One that says it's good for cutting metal, one for wood and one for tight corners in wood (a coping saw).
The space is definitely heating up.
Flux.ai being the incumbent Silixon based out of the UK have been showing demos Quilter and DeepPCB for layout The recent OpenAI demo...
I went the other way and pre-designed sub circuits with a set of rules that allows simple merge assembly, unfortunately I didn't have the time or budget to continue with it, but I took the constrained approach as with hardware, things can't be 99%.
The one thing I will say, is that my experience of hardware engineers is very gatekeepy.
Any questions about the use of AI for any form of automation on forums/Reddit get shot down instantly and the OP's told 'skill issue' more or less. In my opinion, just as with software, most work is simple and should be automated, there will always be a need for the real engineering when it comes to high specification work, high volume optimisation and hardware debug (although Claude code is pretty handy at driving a Jlink)
> The one thing I will say, is that my experience of hardware engineers is very gatekeepy.
Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.
You also need to understand the history of autorouting technology for PCBs. Autorouters with auto layout have been around in many forms for years. Their output never compares to a skilled EE doing it manually. The gap between autorouter output and skilled operator output is even bigger than the gap between a good developer and average AI codegen slop.
I’m interested in this space, but even the Fable/Astra or dedicated tools like Quilter, Flux, and others have a very, very long way to go for boards more complex than simple hobby boards.
I do think this is going to be good for hobby people doing simple PCBs though
> Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.
Where are these communities?
NP-hard problems are still NP-hard even with magical LLM pixie sprinkles. =3
If the magic LLM pixie sprinkles can brute force their way to a solution using viable heuristics and their training data, I will use them.
NP-Hard is NP-hard... "heuristics" in this case is just a euphemism for a fantasy cost-function to scam shareholders.
It is a named problem, and can't be misappropriated like the $9Tn worth of FOSS code "AI" scraped and compacted for isomorphic plagiarism tokens. =3
The best solution might be NP-hard. However we don't need the best, we need one that is good enough, and that is more doable.
So, then how are today's pcb layout techs solving these Np-hard problems in your mind, armed only with Altium?
Magical LLM pixie sprinkles ... is that where magic smoke comes from?
Magic smoke is important, as it indicates a design parameter was exceeded.
I often recommend folks get a mini thermal camera for their phone... as inspecting for issues in electrical, hydraulic, or mechanical systems gets a fair bit easier/safer. =3
They're also NP-hard for the humans doing the majority of the work currently, meaning that good enough heuristics dominate as it is.
Every trace on a PCB is a traveling salesman problem with ballooning complexity.
https://en.wikipedia.org/wiki/Travelling_salesman_problem
While physics informed models do exist, they are still going to burn a lot of compute to generate failure modes people didn't know were possible. =3
https://www.youtube.com/watch?v=T4Upf_B9RLQ
Well, no, it's not.
If anything, it's closer to the bin packing problem. The cost function isn't expressed in terms of lowest cost between nodes, but instead fitting all of the traces with the lowest board layer count while still meeting stuff like EMI crosstalk guidelines. Then there'll be some traces that are very constrained (think DRAM or SERDES links) that have to be length matched, but those are pretty much invariably point to point links that already are heavily automated.
Traces being, say 20% longer than they need to be for an optimal solution doesn't really change the performance of the board in the vast majority of cases since they'll be some of the lowest resistance components of the netlist anyway, as well as the fact that the PCB is normally oversized for the number of traces needed as it fulfills structural/mechanical needs as well as the netlist needs.
And on top of that, because the optimal solution probably is NP-hard, once again, the industry doesn't look for optimal, only good enough. If layout techs in Altium were regularly solving NP-hard problems, computer science would be a different place. The only goal I see is to meet that bar without hiring layout techs.
>Traces being, say 20% longer than they need to be doesn't really change the performance of the board
Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.
Even free Qspice (a more modern Analog Devices LTSpice) is a far better option:
https://www.qorvo.com/design-hub/calculators-simulation/qspi...
>the industry doesn't look for optimal, only good enough
Indeed, that is why your iPhone still weighs 3.7 kg. =3
My experience with hardware engineers, at least IRL, is very different. They love to talk about their work. However, I used to be an EE so that probably helps.
As for Reddit, there's a lot of "bury head in sand and problem will go away" behavior when it comes to AI. People are understandably worried about their jobs, but they're certainly not doing themselves any favors by downplaying AI or looking for "tech niches where AI isn't yet."
Copperhead is very interesting. I do some embedded systems consulting on the side, but I've never enjoyed PCB layout very much. I briefly investigated using AI for it the last time I had to do a board, but it wasn't very helpful.
This is probably not the primary way people use the tool, but if I log in (desktop, Chrome on macOS), click "Start a board" on the sidebar, and go to click any of the inputs, I can't type text in them (the inputs are "Start from an example", "What are you building", and "The brief".
Has anyone had experience with Copperhead vs Astra and kicad? Looking for a similar tool soon
we're developing https://copperbench.org - an open-source benchmark for evaluating ai agents on real, verifiable hardware design tasks.
Copperhead directly edits the KiCad files so that is the CLI version of that Astra demo.
not quite. copperhead operates on its own IR, which then compiles to KiCad files.
This is what I want to know as well. I'm about to kick off a project or two.
Why would somebody ever use a hosted version? I see "One-click gerber, DXF/STEP, render and BOM export" and "Altium support beyond KiCad" in cloud plans, dunno if they are compelling.
Can I take the output of this and get a fully assembled board mailed to me? Thats my dream...
It seems like this is just controlling KiCad. Assuming this produces a BOM as well, you could take the output files, send them to a board house like PCBWay or JLPCB and get the boards stuffed and shipped to you.
The board houses may have questions for you that may be difficult for you to answer, but theoretically you could answer those with AI and get fully assembled boards delivered right to your doorstep.
not quite. copperhead operates on its own hardware IR, compiles verified KiCad files and generates manufacturing outputs.
we're also building a design house around it to close the loop with fabs, handle DFM questions and eventually let you hit "order" and receive fully assembled boards!
Pretty much with the JLC plugin to KiCad.
soon :)
With AI enabled consumer hardware usecases going to explode this is something super relevant. At least 5 startups have pitched their wearables to me and they could definitely use this
Design for Manufacturability (DFM) will determine if they generate a viable product. Hardware is difficult, with a success rate around 1:66 for a startup.
It is a good idea to consult with a contract manufacturer engineering team early, and stop wasting peoples time including their own.
I have also seen people re-brand China pad-printed generic products, and claim they needed investor help buying a shipping container full of cheap stuff or outright e-waste. Careful, especially if you see multiple versions or the same product pop up at the same time. Best of luck =3
Interested in the evaluations of anyone actually using this.
I tested over the weekend and Astra can
- create and modify schematics from instructions - place components and route traces
out of the box, just via normal 'computer use'. I'm not satisfied with the routing but it isn't terrible.
"hardware as fast as software". Please no, lol.
I've imagined a chip running as slow as python.
I’ve read it the same way. Definitely a double edged slogan.
haha nice catch but this is about development speed
LM555 or 300MB nodejs App on a $300 SoC... the choice is clear... lol =3
Let me know when I can build my own Cerebras chips, because we're never going to see them as consumers, otherwise.
Yes yes, I know, leagues apart. Still though... One can dream.
Might be a better website if it wasn't all clearly AI-copy.
"Nothing commits without its gate."
the website isn't the product. try copperhead and judge the engineering :)
The website is the marketing for the product, most people see that first, and they wont go further if your front door is festooned with goofball stuff.
fixed it!
it would propably help thousands of ppl ngl
look inside, sees typescript, walks away.
when LLM calls are the bottleneck, the programming language stops mattering.
https://github.com/i2cjak/T3CAD seems like another promising project
I used claude and gemini to edit/debug kicad schematics. And it was pretty good. What is the point of this agent?
copperhead isn't just a wrapper around claude or gpt. it combines model intelligence with its own hardware IR, deterministic engines and continuous verification.
User just couldn't care less.
Do it have extra feature? Speed? Ease of use?
we have the wrapper orchestrator + additional specialized tools. so yeah we are better than just wrappers.
Some PM realized that agents will not push back against waterfall style project planning, so now we get an agent for all possible versions of waterfall projects.
fair critique but copperhead works as a feedback loop: design, verify, revise and repeat. closer to an engineering control loop than waterfall with an agent on top :)
Is it doing any circuit simulation or anything?
we are building tool plane integrations around the same. stay tuned!
When it gets to the end of the design loops, can it run simulations and tests, or is that out of scope i.e., for another product? (I didn't notice testing on a very quick peruse, but that doesn't mean I didn't simply miss it)
we are building tool plane integrations around the same. stay tuned!
I use a jigsaw to cut wood. It works pretty good. What’s the point of a table saw?
You joke but my coping saw cuts wood much faster than any of my normal saws. I don't know a lot about saws, I presume it's the type of blade on it. And I do indeed have three saws, which is a lot for someone who doesn't know much about saws. One that says it's good for cutting metal, one for wood and one for tight corners in wood (a coping saw).
wait are you the mitxela from youtube fluid simulation pendant video