LPDDR6 (in this day and age of supply-constrained HBM) might indeed be the way to go:
>"One of the most interesting aspects of the technology is the Axelera AI’s decision to use LPDDR6 in lieu of High-Bandwidth Memory. Many advanced AI accelerators rely on HBM because of its extremely high performance, but it is also expensive, supply constrained in the current market, requires significant power, and contributes substantial overall system cost. Titania’s use of LPDDR6 memory allows for much larger memory capacity per package while also reducing power consumption and easing manufacturing constraints somewhat.
The decision to use LPDDR6 also suggests a broader belief that the future of some AI inference workloads may not always be limited by memory bandwidth. Titania still features 128MB of high-speed, on-chip SRAM and its
LPDDR6 memory interface offers over 2.4TB/s of bandwidth
per system-in-package, or SiP, module but many modern AI inference workloads, particularly mixture-of-experts models, depend heavily on memory capacity and efficient utilization rather than peak bandwidth. Axelera AI is building Titania with a balance of compute, memory, and data movement capabilities that should deliver better real-world economics than simply pursuing maximum bandwidth at any cost."
LPDDR6 (in this day and age of supply-constrained HBM) might indeed be the way to go:
>"One of the most interesting aspects of the technology is the Axelera AI’s decision to use LPDDR6 in lieu of High-Bandwidth Memory. Many advanced AI accelerators rely on HBM because of its extremely high performance, but it is also expensive, supply constrained in the current market, requires significant power, and contributes substantial overall system cost. Titania’s use of LPDDR6 memory allows for much larger memory capacity per package while also reducing power consumption and easing manufacturing constraints somewhat.
The decision to use LPDDR6 also suggests a broader belief that the future of some AI inference workloads may not always be limited by memory bandwidth. Titania still features 128MB of high-speed, on-chip SRAM and its
LPDDR6 memory interface offers over 2.4TB/s of bandwidth
per system-in-package, or SiP, module but many modern AI inference workloads, particularly mixture-of-experts models, depend heavily on memory capacity and efficient utilization rather than peak bandwidth. Axelera AI is building Titania with a balance of compute, memory, and data movement capabilities that should deliver better real-world economics than simply pursuing maximum bandwidth at any cost."